With the development of microelectronics technology into nanoscale, power consumption has become the major factor restricting the technology development, so the low power consumption devices have become a research hotspot in the field of semiconductor devices. The negative capacitance field effect transistor (NCFET) based on the negative capacitance effect of ferroelectric materials can effectively reduce the subthreshold swing of the device, thereby reducing the power consumption of the device. In this paper, a ferroelectric negative capacitance field effect transistor based on silicononinsulator(SOI) structure is designed. The negative capacitance transistor is simulated by using the TCAD Sentaurus simulation tool and the device structure and parameters of the negative capacitance field effect transistor with a subthreshold swing of 30.931 mV/dec are obtained. Finally, the effects of ferroelectric layer thickness and equivalent gate oxide thickness on the subthreshold characteristics of ferroelectric negative capacitor field effect transistors are simulated and studied.